In digital twin (DT) systems, maintaining precise synchronization between the physical twin and the cyber twin is important for accurate system operation. However, synchronization errors (SE) accumulate over time, leading to substantial performance degradation. In this paper, the optimal inference task length that minimizes SE while maximizing the number of successfully processed inference task bits is analyzed. In previous studies, the synchronization status was evaluated using age of information (AoI), but AoI has a limitation that it cannot sufficiently reflect synchronization errors that may increase exponentially due to cumulative inaccuracies. To address this limitation, a novel performance metric, synchronization error per bit (SE/bit), is introduced, and an optimization problem is formulated based on this metric. A mathematical framework is developed, leveraging an update task model that follows a Poisson arrival process to derive the optimal inference task length that minimizes SE/bit. The analysis demonstrates that the optimal task length is independent of the system's update interval and delay time, instead being determined by the synchronization sensitivity parameter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\alpha$</tex>. Furthermore, simulation results validate the effectiveness of the proposed model, showing that the optimal inference task length is associated with minimized SE and maximized successfully processed inference task bits. In this study, a scheduling and optimization framework is established to enhance inference task bit processing while minimizing synchronization errors in DT environments, making it applicable to various realtime DT applications.