This paper presents a dynamic power transistor-based capacitor-less low-dropout (CL-LDO) regulator for a wide load range. The proposed adaptive DC level shifter enables the operation at the light load by adaptively providing the required V<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</inf> of the source follower regarding load. The dynamic power transistor (DPT) controls the non-dominant pole to ensure stability over a wide load range and improve PSRR. The proposed CL-LDO is implemented in a 45-nm CMOS process. The phase margin is improved from 14 deg to 79 deg at the light load condition (I${}_L=10\mu$A). The PSRR improved by 53 dB.