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·2025
Virtual Metrology of Multiple Dielectric Layer Thickness for 3D-NAND Deposition Process
Hye Eun Sim, Min Uk Lee, Sang Jeen Hong
IF 2.3IEEE Transactions on Semiconductor Manufacturing
초록

With the growing emphasis on three-dimensional (3D) vertical structures for enhancing the storage capacity and performance of 3D-NAND flash memory devices, precise control and prediction of process results to minimize process variability are important. Herein we predicted the layer thickness of an oxide/nitride (ON) dielectric stack for a 3D-NAND deposition process using artificial intelligence (AI). We investigated the key variables influencing the thicknesses of multiple dielectrics to propose strategies for mitigating thickness variation. We constructed a virtual metrology (VM) model based on status-variable identification (SVID) and optical emission spectroscopy (OES) data collected from plasma deposition equipment, and employed explainable AI (XAI) algorithms to interpret the significance of variables affecting the process results. XAI also supports the reliability of AI-predictive models for determining the thicknesses of the deposited multi-layered ON stack. Using variables derived from the SVID and OES data, the models for predicting oxide layer thickness, nitride layer thickness, and the thicknesses of both oxide and nitride layers achieved accuracies of 99%, 88% and 99%, respectively. This study highlights the importance of developing high-performance VM models and interpreting predictive outcomes for precise process control in semiconductor plasma processes.

키워드
DielectricMetrologyDeposition (geology)Atomic layer depositionMaterials scienceLayer (electronics)Process (computing)Electronic engineeringOptoelectronicsNAND gate
타입
article
IF / 인용수
2.3 / 0
게재 연도
2025