The rapid reduction of interconnect critical dimension (CD) in logic devices and the increased contact/via height in 3-D memory devices have led to problematic gap-filling processes and the occurrence of void defects, resulting in increased contact/via resistance or complete contact/via failure. However, the low thermal budget of the back-end-of-line (BEOL) stage limits the temperature range available for conventional thermal processes, such as furnace annealing and rapid thermal annealing. This article presents an approach to address contact/via failures, using nanosecond green laser annealing (NGLA) with a low energy fluence (= 0.1 J/cm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${}^{{2}}\text {)}$</tex-math> </inline-formula>. By exploiting NGLA’s ability to selectively induce high temperatures for ultrashort durations on metal interconnects, we have developed a process that effectively recovers contact/via failures without compromising the performance of both front-end-of-line (FEOL) and BEOL stages.