Scalable Inter‐Dielectric Engineering via Vapor‐Phase Synthesis Process for Top‐Gate MoS 2 Thin‐Film Transistor
Seohak Park, Mingu Kang, Inseong Lee, Seungsun Yoo, Sejin Kim, Hyeongjin Lim, Woonggi Hong, Min Ju Kim, Cheolmin Park, Jeoungmin Ji, Seunghyup Yoo, Sung‐Yool Choi
IF 12.1Small
초록
top-gate transistors and logic circuits, demonstrating its potential for scalable and large-area high-performance 2D electronics.