This paper introduces a novel non-RC, leakage-based relaxation oscillator designed as a timer in ultra-low-power (ULP) applications. The proposed oscillator structure is created by stacking a source degeneration and a common-gate amplifier within a single branch, which effectively suppresses the temperature dependence of the leakage current. This temperature sensitivity is further mitigated through a two-point calibration method using a thermometer-driven nonlinear polynomial fitting process. The oscillator is designed to produce a 1.3 kHz output and is fabricated using a 180-nm CMOS process, occupying an active area of 0.108 mm² (including estimates for off-chip blocks). The oscillator consumes 1.43 nW, achieving a power efficiency of 1.1 nW/kHz. It maintains an average temperature sensitivity of 67.3 ppm/°C over a 0-to-90°C temperature range. The supply sensitivity of the oscillator is measured at 0.055%/V across a supply voltage range of 1.1 V to 1.8 V, and the measured Allan deviation floor is 20 ppm.