Fractional Gain control Technique for a Low-Jitter and Area-Efficient Digital Phase-Locked Loop

Fractional gain control technique for a low-jitter and area-efficient digital phase-locked loop

A Low Power Buffer-Feedback Oscillator with Current Reused Structure

A 0.012 mm(2) and 2.5 mW bang-bang digital PLL using pseudo random number generator

A 0.012 mm2 and 2.5 mW Bang-Bang Digital PLL Using Pseudo Random Number Generator

고주파수 영역의 정확도 높은 RF 부성저항 회로 분석

Analysis of Substrate Shielding Methods for Sub-THz On-Chip Inductors

Dither control circuit and devices having the same

Erratum: STI edge effect on the series resistance of CMOS Schottky barrier diodes

A low supply voltage and wide-tuned CMOS Colpitts VCO