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1
HLS를 이용한 FPGA기반 ML-DSA 양자내성암호 하드웨어 가속기 설계
반도체공학회, 2024
2
SLH-DSA 기반 디지털 서명 및 검증 FPGA 시스템 구현
반도체공학회, 2024
3
Integer Modular Multiplication With Barrett Reduction and Its Variants for Homomorphic Encryption Applications: A Comprehensive Review and an Empirical Study
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2024
4
Configurable Arithmetic Core Architecture for RNS-CKKS Homomorphic Encryption
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2024
5
A Configurable ML-KEM/Kyber Key-Encapsulation Hardware Accelerator Architecture
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, USA, NJ, 08855, 2024
6
HLS-based HW/SW Co-design and Hybrid HLS-RTL Design for Post-Quantum Cryptosystem
IEEK PUBLICATION CENTER, RM #907 SCIENCE & TECHNOLOGY NEW BLDG, 635-4 YUCKSAM-DONG, SEOUL, SOUTH KOREA, KANGNAM-KU, 135-703, 2024
7
A Bootstrapping-Capable Configurable NTT Architecture for Fully Homomorphic Encryption
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2024
8
Hardware Circuits and Systems Design for Post-Quantum Cryptography-A Tutorial Brief
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, USA, NJ, 08855, 2024
9
Efficient Low-Latency Hardware Architecture for Module-Lattice-Based Digital Signature Standard
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2024
10
An Efficient Unified Polynomial Arithmetic Unit for CRYSTALS-Dilithium
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, USA, NJ, 08855, 2023
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