발행물

전체 논문

72

21

A 18.5nW 12-bit 1-kS/s Reset-energy Saving SAR ADC for Bio-Signal Acquisition in 0.18um CMOS
Min-Jae Seo, Dong-Hwan Jin, Ye-Dam Kim, Sun-Il Hwang, Jong-Pal Kim, Seung-Tak Ryu
IEEE TCAS-I, 2018

22

A Reusable Code-based SAR ADC Design With CDAC Compiler and Synthesizable Analog Building Blocks
Min-Jae Seo, Yi-Ju Roh, Dong-Jin Chang, Wan Kim, Ye-Dam Kim, Seung-Tak Ryu
IEEE TCAS-II, 2018

23

A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme
Hyun-Wook Kang, Hyeok-Ki Hong, Wan Kim, Seung-Tak Ryu
IEEE JSSC, 2018

24

A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs
Si-Nai Kim, Woo-Cheol Kim, Min-Jae Seo, Seung-Tak Ryu
IEEE TCAS-II, 2018

25

A 2.7-M Pixels 64-mW CMOS Image Sensor With Multicolumn-Parallel Noise-Shaping SAR ADCs
Sun-Il Hwang, Jae-Hyun Chung, Hyeon-June Kim, Il-Hoon Jang, Min-Jae Seo, Sang-Hyun Cho, Heewon Kang, Minho Kwon, Seung-Tak Ryu
IEEE TED, 2018

26

A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling
Il-Hoon Jang, Min-Jae Seo, Mi-Young Kim, Jae-Keun Lee, Seung-Yeob Baek, Sun-Woo Kwon, Michael Choi, Hyung-Jong Ko, Seung-Tak Ryu
IEEE JSSC, 2018

27

A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration
Dong-Jin Chang, Min-Jae Seo, Hyeok-Ki Hong, Seung-Tak Ryu
IEEE TCAS-II, 2018

28

A Dual-Imaging Speed-Enhanced CMOS Image Sensor for Real-Time Edge Image Extraction
Hyeon-June Kim, Sun-Il Hwang, Jae-Hyun Chung, Jong-Ho Park, Seung-Tak Ryu
IEEE JSSC, 2017

29

Power-efficient flash ADC with complementary voltage-to-time converter
D.-R. Oh, D.-S. Jo, K.-J. Moon, Y.-J. Roh, S.-T. Ryu
IET Electronics Letters, 2017

30

Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC
Dong-Jin Chang, Wan Kim, Min-Jae Seo, Hyeok-Ki Hong, Seung-Tak Ryu
IEEE TCAS-I, 2017