Stochastic Cell- and Bit-Discard Technique to Improve Randomness of a TRNG

Compact SRAM-Based PUF Chip Employing Body Voltage Control Technique

Regression Model-Based AMS Circuit Optimization Technique Utilizing Parameterized Operating Condition

A Low-Power Class-C Voltage-Controlled Oscillator with Robust Start-Up and Compact High-Q Capacitor Array

Three-Dimensional Selective Oxidation Fin Channel MOSFET Based on Bulk Silicon Wafer

5-bit FLASH A/D Converter Employing Time-interpolation Technique

A 12.8-Gbaud ADC-based Wireline Receiver with Embedded IIR Equalizer

A 12-bit 1.6, 3.2, and 6.4 GS/s 4-b/cycle Time-Interleaved SAR ADC with Dual Reference Shifting and Interpolation

An embedded passive gain technique for asynchronous SAR ADC achieving 10.2 ENOB 1.36-mW at 95-MS/s in 65 nm CMOS

A dual-channel pipelined ADC with sub-ADC based on flash–SAR architecture