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전체 논문

123

51

Two versions of architectures for dynamic implied addressing mode
윤종희, 안민욱, 김종웅, 조정훈, 백윤흥
JOURNAL OF SYSTEMS ARCHITECTURE, 201008

52

Operation and Data Mapping for CGRAs with Multi-bank Memory
김용주, 이종은, Aviral Shrivastava, 백윤흥
ACM SIGPLAN NOTICES, 201004

53

A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained Reconfigurable Architectures
윤종희, Shrivastava, A, 박상현, 안민욱, 백윤흥
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 200911

54

Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications
Cho, DS, Pasricha, S, Issenin, I, Dutt, ND, Ahn, MW, Paek, YH
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 200904

55

Compiler driven data layout optimization for regular/irregular array access patterns
Cho D (Cho, Doosan), Pasricha S (Pasricha, Sudeep), 백윤흥, Ko S (Ko, SunJun), Dutt N (Dutt, Nikil), Issenin I (Issenin, Ilya)
ACM SIGPLAN NOTICES, 200807

56

A retargetable parallel-programming framework for MPSoC
백윤흥, 김용주, 하순회, 전우철, 권성남
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 200807

57

Register file power reduction using bypass sensitive compiler
박상현, 백윤흥, Alex Nicolau, Eugene Earlie, Nikil Dutt, Aviral Shrivastava
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 200806

58

Automatic design space exploration of register bypasses in embedded processors
Dutt, N., Nicolau, A., Shrivastava, A, Park, S, Earlie. E, 백윤흥
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 200712

59

Efficient embedded code generation with multiple load/store instructions
백윤흥, 안민욱, 조두산, 김태환
SOFTWARE - PRACTICE AND EXPERIENCE, 200709

60

Optimistic coalescing for heterogeneous register architectures
백윤흥, 안민욱, 이주연
ACM SIGPLAN NOTICES, 200707