Abstract This paper presents a high‐power‐density solid‐state transformer (SST) designed for 25 kV alternative current railway applications, delivering a 3 kV direct current output to traction inverters. The SST is composed of sub‐modules with the adoption of 1.7 kV insulated gate bipolar transistor and SiC metal oxide field effect transistor (MOSFET) in an input‐series–output‐series structure, providing higher power density than conventional topologies that rely on high‐voltage switches (>1.7 kV). Because these high‐voltage SiC MOSFETs are still expensive and not fully commercialised, the proposed approach offers a more cost‐effective alternative. A total of 42 converter cells ensure a highly modular and scalable design, with precise synchronisation and high‐speed control achieved through an EtherCAT‐based communication network. Additionally, a distributed control algorithm is introduced, mitigating excessive dependence on the communication link for module‐level operations. The effectiveness of the entire system—including the design and control schemes—has been experimentally verified, ranging from individual converter cells to a reduced SST prototype of up to three sub‐modules. These results confirm the feasibility and advantages of the proposed SST in terms of power density, cost efficiency and reliability for railway traction applications.

Due to the difference between inverter-side and grid-side currents in theLCLfilter, an Active Power Filter (APF) with an Inverter-side Current Feedback (ICF) configuration may struggle to accurately supply harmonic currents caused by nonlinear loads. In a large-capacity APF operating at low switching frequencies (5 kHz or less), the resonant frequency of theLCLfilter is typically designed to be 2.5 kHz or less, which is below the recommended maximum harmonic current order of the 50th(3 kHz) to meet harmonic regulations specified by grid standards. As a result, meeting these grid standard recommendations becomes challenging for a large-capacity APF with ICF configuration. To address this issue, this paper proposed a method for modifying the harmonic current reference based on the transfer function of the difference between inverter-side and grid-side currents, enabling accurate harmonic current supply even with the ICF configuration. Since the proposed method depends onLCLfilter parameters, a detailed performance evaluation accounting for parameter variations was conducted, and the effectiveness of the proposed method was validated. Through simulations and experiments, it was confirmed that applying the proposed method effectively improves both Individual Harmonic Distortion (IHD) and Total Harmonic Distortion (THD).

Capacitor Current Feedback (CCF)-Active Damping (AD) is widely adopted due to its effective attenuation of LCL filter resonance and its straightforward implementation. However, CCF-AD suffers from potential instability issues arising from digital control delays. Specifically, CCF-AD forms a frequency-dependent virtual impedance, and digital control delays can cause the virtual resistance to become negative in frequency ranges above one-sixth of the sampling frequency (fs/6). These negative virtual resistances can introduce unstable poles into the open-loop transfer function, leading to Non Minimum Phase (NMP) behavior in the control loop. NMP systems require strict stability conditions, which are difficult to satisfy under weak grid conditions where the grid inductance can vary significantly. As a result, the control loop can easily become unstable under variations in grid inductance. To address this issue, the Positive Virtual Resistance Region (PVRR) must be extended. This paper proposes extending the PVRR up to one third of the sampling frequency (fs/3) by inserting a differentiator into the capacitor current feedback path. A detailed mathematical analysis of the proposed method is presented in the z-domain, and the theoretical results are validated through experimental verification.

The Triple-Active Bridge (TAB) converter is a representative topology that seamlessly integrates DC sources and loads with galvanic isolation. Especially, there is a growing demand for an asymmetric TAB converter that provides distinct nominal powers at three ports, particularly in electric vehicles and power distribution systems. From the perspective of converter design, the leakage inductance is significant because it is related to Zero Voltage Switching (ZVS) of switches, and finally affects the power efficiency. Previous papers didn't consider the asymmetric TAB converter and a clear guideline of designing leakage inductance for it has not been presented. In this situation, this paper proposes a new method for determining leakage inductance for the asymmetric TAB converter. By using the proposed method, the ZVS regions in all power flow conditions are extended up to 62% more than those of the conventional method. Consequently, switching losses under light load conditions are significantly reduced, enabling the converter to attain high power efficiency in a wide range of power conditions. The unified expression of asymmetric leakage inductance is addressed through the delta equivalent model of the TAB converter, and the comprehensive analysis of ZVS is discussed. The effect of the ZVS region extension with the proposed method is verified by comparing the ZVS regions between the conventional and proposed configurations. Through the simulation model of high-power scale, switch losses are estimated in various power flow conditions, validating the feasibility of the proposed method in practical industrial applications. The performance of the proposed method is finally demonstrated through a 3kW reduced-scale TAB converter.

Abstract This paper presents a high‐power‐density solid‐state transformer (SST) designed for 25 kV alternative current railway applications, delivering a 3 kV direct current output to traction inverters. The SST is composed of sub‐modules with the adoption of 1.7 kV insulated gate bipolar transistor and SiC metal oxide field effect transistor (MOSFET) in an input‐series–output‐series structure, providing higher power density than conventional topologies that rely on high‐voltage switches (>1.7 kV). Because these high‐voltage SiC MOSFETs are still expensive and not fully commercialised, the proposed approach offers a more cost‐effective alternative. A total of 42 converter cells ensure a highly modular and scalable design, with precise synchronisation and high‐speed control achieved through an EtherCAT‐based communication network. Additionally, a distributed control algorithm is introduced, mitigating excessive dependence on the communication link for module‐level operations. The effectiveness of the entire system—including the design and control schemes—has been experimentally verified, ranging from individual converter cells to a reduced SST prototype of up to three sub‐modules. These results confirm the feasibility and advantages of the proposed SST in terms of power density, cost efficiency and reliability for railway traction applications.

Capacitor Current Feedback (CCF)-Active Damping (AD) is widely adopted due to its effective attenuation of LCL filter resonance and its straightforward implementation. However, CCF-AD suffers from potential instability issues arising from digital control delays. Specifically, CCF-AD forms a frequency-dependent virtual impedance, and digital control delays can cause the virtual resistance to become negative in frequency ranges above one-sixth of the sampling frequency (fs/6). These negative virtual resistances can introduce unstable poles into the open-loop transfer function, leading to Non Minimum Phase (NMP) behavior in the control loop. NMP systems require strict stability conditions, which are difficult to satisfy under weak grid conditions where the grid inductance can vary significantly. As a result, the control loop can easily become unstable under variations in grid inductance. To address this issue, the Positive Virtual Resistance Region (PVRR) must be extended. This paper proposes extending the PVRR up to one third of the sampling frequency (fs/3) by inserting a differentiator into the capacitor current feedback path. A detailed mathematical analysis of the proposed method is presented in the z-domain, and the theoretical results are validated through experimental verification.

Due to the difference between inverter-side and grid-side currents in theLCLfilter, an Active Power Filter (APF) with an Inverter-side Current Feedback (ICF) configuration may struggle to accurately supply harmonic currents caused by nonlinear loads. In a large-capacity APF operating at low switching frequencies (5 kHz or less), the resonant frequency of theLCLfilter is typically designed to be 2.5 kHz or less, which is below the recommended maximum harmonic current order of the 50th(3 kHz) to meet harmonic regulations specified by grid standards. As a result, meeting these grid standard recommendations becomes challenging for a large-capacity APF with ICF configuration. To address this issue, this paper proposed a method for modifying the harmonic current reference based on the transfer function of the difference between inverter-side and grid-side currents, enabling accurate harmonic current supply even with the ICF configuration. Since the proposed method depends onLCLfilter parameters, a detailed performance evaluation accounting for parameter variations was conducted, and the effectiveness of the proposed method was validated. Through simulations and experiments, it was confirmed that applying the proposed method effectively improves both Individual Harmonic Distortion (IHD) and Total Harmonic Distortion (THD).

The Triple-Active Bridge (TAB) converter is a representative topology that seamlessly integrates DC sources and loads with galvanic isolation. Especially, there is a growing demand for an asymmetric TAB converter that provides distinct nominal powers at three ports, particularly in electric vehicles and power distribution systems. From the perspective of converter design, the leakage inductance is significant because it is related to Zero Voltage Switching (ZVS) of switches, and finally affects the power efficiency. Previous papers didn't consider the asymmetric TAB converter and a clear guideline of designing leakage inductance for it has not been presented. In this situation, this paper proposes a new method for determining leakage inductance for the asymmetric TAB converter. By using the proposed method, the ZVS regions in all power flow conditions are extended up to 62% more than those of the conventional method. Consequently, switching losses under light load conditions are significantly reduced, enabling the converter to attain high power efficiency in a wide range of power conditions. The unified expression of asymmetric leakage inductance is addressed through the delta equivalent model of the TAB converter, and the comprehensive analysis of ZVS is discussed. The effect of the ZVS region extension with the proposed method is verified by comparing the ZVS regions between the conventional and proposed configurations. Through the simulation model of high-power scale, switch losses are estimated in various power flow conditions, validating the feasibility of the proposed method in practical industrial applications. The performance of the proposed method is finally demonstrated through a 3kW reduced-scale TAB converter.

With the recent development of electric vehicles and renewable energy, the demand for high-efficiency bidirectional DC-DC converters has been increasing. The Four-Switch Buck-Boost (FSBB) converter is considered one of the promising topologies due to its wide input/output voltage range and high power density. In FSBB converter, quadrangle modulation enables zero-voltage switching(ZVS) turn-on, improving efficiency and allowing an increase in switching frequency. However, despite these advantages, quadrangle modulation involves a complex control mechanism, and generating the negative offset current required for ZVS turn-on is challenging. Conventional approaches to generating the negative offset current require complex circuit configurations to determine the switching instant for generating the negative offset current. The presence of these complex circuits increases the overall system complexity, expands the control board size, and raises manufacturing costs. Moreover, since the current of the switch must be measured and utilized, implementing the required sensing hardware becomes challenging in high-power applications. Alternatively, the negative offset current can be controlled by using a look-up table. However, in such cases, parameter variations may prevent the offset current from accurately reaching its target value, which can lead to control instability and a reduction in system efficiency. This paper proposes a control method that generates the negative offset current using only inductor current sensing, along with a detailed design methodology and gain-setting approach for the controller.

This paper proposes a design the turn ratio of the high-frequency transformer for maximizing the zero-voltage switching region under varying output voltage conditions. The dual active bridge converter can achieve zero-voltage switching for all switches when the input-to-output voltage ratio is unity. However, when the input-to-output voltage ratio differs from unity, hard switching occurs, leading to increased switching losses. This issue is crucial in battery-connected systems with variable voltage, where maintaining a wide zero-voltage switching region is essential for achieving high-efficiency. Among the parameters related to the dual active bridge converter, the turn ratio of the high-frequency transformer is a crucial design parameter in determining the zero-voltage switching region, as it directly affects the voltage ratio between the primary and secondary sides. Conventional method designs the turn ratio based on the midpoint of the output voltage variation condition (i.e. battery voltage), but this approach does not guarantee a maximized zero-voltage switching region under varying conditions. In this paper, unlike the conventional method of evaluating the ZVS area of a DAB converter using the phase shift ratio and the primary/secondary voltage ratio, a method of evaluating the ZVS area using the power between the primary/secondary sides and the voltage ratio is proposed. Through mathematical analysis, the turn ratio that maximizes the zero-voltage switching region is analytically derived, and the effectiveness of the proposed design method is verified through experiments.