발행물
컨퍼런스
IEEE MTT-S Int. Microwave Symp. Dig.
2018.06
,
A Low-Phase-Noise 20 GHz Phase-Locked Loop with Parasitic Capacitance Reduction Technique for V-band Applications
A 110–125 GHz 27.5 dB Gain Low-power I/Q Receiver Front-end in 65 nm CMOS Technology
IEEE RFIC
A 120 GHz I/Q Transmitter Front-end in a 40 nm CMOS for Wireless Chip to Chip Communication
IEEE RWS
2018
A 60-GHz low-profile, wide-band, and high-gain E-shaped patch array with parasitic patches
IEEE 18th SiRF
A 120 GHz wideband low-power down converter for wireless chip-to-chip communication