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New Word-line Driving Scheme for Suppressing Oxide-Tunneling Leakage in Sub-65-nm SRAMs

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Embedded Pseudo SRAM with 320x120x18 Bits and Dual I/O Ports for Display IC

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Power-Efficient Dickson-Based Charge Pump Circuit without Output Voltage Loss

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Level shifter circuit with fast delay and low-power consumption

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Comparative study on SRAMs for suppressing both oxide0tunneling leakage and subthreshold leakage in sub-70-nm leakage dominant VLSIs