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주요 논문
3
1
A 48-Gb/s PAM-4 Transceiver with Transition Boosting and RLM Calibration for Next-Generation Memory Interface Testing
Chan-Ho Kye, Daeho Yun, Jeonghyeon Han, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong, Jooyeol Rhee
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025.12
2
Design Methodology for Compact Single-Channel 3-Stage Capacitor-Array-Assisted Charge-Injection DAC-Based SAR ADC
Chan‐Ho Kye, Yu-Jin Byeon, Kyojin Choo, Min-Seong Choo
IEEE Transactions on Circuits and Systems I Regular Papers, 2024
3
A 22-Gb/s 0.95-pJ/b Energy-Efficient Voltage-Mode Transmitter With Time-Based Feedforward Equalization in a 28-nm CMOS
Chan‐Ho Kye, Han-Gon Ko, Jinhyung Lee, Deog‐Kyoon Jeong
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020
전체 논문
9
필터 설정하기
1
A 48-Gb/s PAM-4 Transceiver with Transition Boosting and RLM Calibration for Next-Generation Memory Interface Testing
Chan-Ho Kye, Daeho Yun, Jeonghyeon Han, Minsu Park, Kahyun Kim, Kyungmin Baek, Eonhui Lee, Woo-Seok Choi, Deog-Kyoon Jeong, Jooyeol Rhee
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025.12
2
Design Methodology for Compact Single-Channel 3-Stage Capacitor-Array-Assisted Charge-Injection DAC-Based SAR ADC
Chan‐Ho Kye, Yu-Jin Byeon, Kyojin Choo, Min-Seong Choo
IEEE Transactions on Circuits and Systems I Regular Papers, 2024
3
A 22-Gb/s 0.95-pJ/b Energy-Efficient Voltage-Mode Transmitter With Time-Based Feedforward Equalization in a 28-nm CMOS
Chan‐Ho Kye, Han-Gon Ko, Jinhyung Lee, Deog‐Kyoon Jeong
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2020
4
A 14-to-32-Gb/s Deadzone-Free Referenceless CDR With Autocovariance-Based Seamless Frequency Detector in 40-nm CMOS Technology
Hong-Seok Choi, J.J. Lee, Shaofang Gong, Kwang‐Ho Lee, Daehyun Koh, Jung-Woo Sull, Hyungrok Do, Chan‐Ho Kye, Deog‐Kyoon Jeong, Kwanseo Park, Min-Seong Choo
IEEE Journal of Solid-State Circuits, 2025
5
Rapid Prototyping of Laser-Induced Graphene Sensors With Open-Source Silicon: Paving the Way for Low-Cost and Robust Flexible Wearable Sensing
Anhang Li, Hongyi Wu, Madhulika Lingamguntla, Ashbir Aviat Fadila, Chan‐Ho Kye, Arvind Balijepalli, Tim Ansell, Nigel J. Coburn, Sachin Nadig, Mehdi Saligane
IEEE Solid-State Circuits Magazine, 2024
6
A 4.5-to-14 GHz PLL-based Clock Driver with Wide-range 3-shaped LC-VCOs for GDDR6 DRAM Test
Chan‐Ho Kye, Jihee Kim, Deog‐Kyoon Jeong, Min-Seong Choo
JSTS Journal of Semiconductor Technology and Science, 2024
7
Balancing scheme for phase current and flying‐capacitor voltage in three‐level DC–DC converter
Minho Choi, Chan‐Ho Kye, Deog‐Kyoon Jeong
Electronics Letters, 2020
8
A 0.45 pJ/b, 6.4 Gb/s Forwarded-Clock Receiver With DLL-Based Self-Tracking Loop for Unmatched Memory Interfaces
Soyeong Shin, Han-Gon Ko, Chan‐Ho Kye, Sang‐Yoon Lee, Jaekwang Yun, Doobock Lee, Hae-Kang Jung, Suhwan Kim, Deog‐Kyoon Jeong
IEEE Transactions on Circuits & Systems II Express Briefs, 2019
9
A Current-Mode Digital AOT 4-Phase Buck Voltage Regulator
Minho Choi, Chan‐Ho Kye, Jonghyun Oh, Min-Seong Choo, Deog‐Kyoon Jeong
IEEE Solid-State Circuits Letters, 2019