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컨퍼런스
Proceedings of the IEEE Asia-Pacific International Symposium and Exhibition on Electromagnetic Compatibility
2019.05
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A Wide-band Passive Equalizer Design Using Multi-layer PCB Parasitics for 30 Gbps Serial Data Transmission
Proceedings of the IEEE Electrical Design of Advanced Packaging & Systems Symposium
2009.12
Design of Toroidal Current Probe Embedded in Multi-layer Printed Circuit Boards for Electrostatic Discharge(ESD) Detection
Proceedings of the IEEE 19th Conference on Electrical Performance of Electronic Packaging
2027.10
A Compact, Low-cost, and Wide-band Passive Equalizer Design Using Multi-layer PCB Parasitics
2016.04
A Designated Clock Generation and Distribution (DCGD) Chip Scheme for Substrate Noise-Free 3-D Stacked SiP Design
2004.12
A Fast and Precise Analytical Eye-diagram Estimation Method for a Channel of a Pair of Differential Microstriplines on PCB with Arbitrary Terminations