This paper introduces an innovative Interpolation-based Radar Simulation System (IRSS) designed to simulate Doppler frequencies across multiple frequencies with minimal hardware complexity. Traditional radar simulation systems, such as Analog Radar System Simulators (ARSS) and Digital Radar System Simulators (DRSS), face challenges when supporting multi-frequency simulations due to the need for parallel processing of individual Doppler frequencies. The proposed IRSS exploits linear interpolation and superposition property, enabling a single interpolation process to handle multiple frequency components efficiently. The IRSS structure was implemented using an FPGA-based USRP, and its performance was evaluated through experim-ental testing. The results demonstrated that the IRSS accurately generated Doppler frequencies for both single and multi-frequency signals, maintaining consistency with theoretical predictions. The system effectively simulated Doppler shifts for various target speeds while preserving hardware simplicity, unlike traditional simulators that require increased resources proportional to the number of frequencies. This research highlights the advantages of using linear interpolation to reduce hardware complexity and improve scalability in radar simulators. Consequently, the proposed IRSS provides a cost-effective and efficient solution for modern radar systems that demand multi-frequency capabilities, making it well-suited for applications in complex environments such as autonomous vehicles, military operations, and aviation.

This paper presents the efficient digital Ex-core Neutron Flux Monitoring System (ENFMS) based on Field Programmable Gate Array (FPGA), designed to precisely measure reactor power levels across a wide operational range from 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−8</sup> % to 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> %. Conventional analog based ENFMS inherently suffers from low system performance, complex maintenance, susceptibility to environmental noise, and issues related to chip obsolescence. To address these challenges, the proposed system employs FPGA based digital signal processing, implementing three optimized measurement modes, namely Pulse, Mean Square Value (MSV), and Current, to effectively cover the entire operational range. A linear interpolation algorithm also provides smooth and continuous transitions between overlapping modes. Furthermore, the System on Chip (SoC) architecture integrates all signal processing functions onto a single FPGA chip, significantly reducing system size, complexity, and power consumption. Experimental evaluations performed on a Xilinx Kintex UltraScale FPGA platform demonstrated a short latency of approximately 3.49 μs at a 500 MHz clock frequency, high data throughput of 8.0 GB/s, and power consumption of about 6.3 W. Moreover, the system exhibited excellent measurement accuracy with a low RMS error of 0.0197 V throughout the entire operational range. Consequently, the proposed digital ENFMS significantly improves potential applicability, accuracy, and maintainability, making it well suited not only for existing nuclear instrumentation systems but also for emerging reactor technologies such as Small Modular Reactors (SMRs).

Since the use of lightweight cryptography for Internet of Things (IoT) security increases, it is necessary to inform significant threats to IoT devices through research on the attacks of lightweight cryptography. This article demonstrates successful attacks on six lightweight cryptographies: DESL, LBlock, TWINE, PRESENT, KLEIN, and LED, after investigating over 50 modern lightweight cryptographies built on SRAM field-programmable gate arrays (FPGAs). We first describe the fundamental procedure of an S-box attack to detect and manipulate S-box within the FPGA bitstream and then carefully customize the S-box attacks for each lightweight cryptography in order to weaken plaintext or key information. For practical analysis, a typical IoT platform based on Cortex-M0 operating at 50 MHz is implemented along with a variety of cryptography algorithms and design options on three Xilinx FPGA chips: Spartan-6, Artix-7, and Kintex Ultrascale. According to experimental results, the proposed attack successfully extracts the full 64-bit plaintext for DESL, LBlock, and TWINE. For KLEIN and LED, the full 64-bit keys are recovered, and for PRESENT, 80% of the 64-bit keys out of the total 80-bit keys are partially retrieved. We emphasize that the purpose of this article is not to provide attackers with a feasible attack strategy, but rather to raise awareness about the possibility of an attacker manipulating the lightweight cryptography on FPGA devices.

This paper proposes a GPU-based high-speed signal generation algorithm for effectively simulating the operational environment of the Ex-Core Neutron Flux Monitoring System (ENFMS), which is essential for advanced reactor systems such as Small Modular Reactors (SMRs). Accurate and rapid modeling of neutron, gamma-ray, and electrical noise signals is essential for reliable nuclear fuel monitoring and early anomaly detection. Although conventional CPU-based sequential simulation methods provide precise results, they become impractical under high reactor power conditions or extended simulation durations due to excessive computational demands. To resolve these limitations, we developed a parallel computing framework optimized for high-performance task distribution between CPU and GPU resources. Experimental results demonstrate that the proposed GPU-based implementation reduces elapsed times by up to 99.57 %, 99.43 %, and 98.54 % compared to CPU implementations using MATLAB, Python, and C, respectively. Therefore, the proposed GPU-based parallel algorithm significantly enhances feasibility of realistic and efficient ENFMS simulations, contributing to accelerated development and validation of digital and compact SMR systems.

In this paper, we propose a smart Advanced Metering Infrastructure (AMI) system for city gas that addresses the limitations of conventional metering methods through wireless communication. Traditional systems, which rely on manual inspection or Power Line Communication (PLC), face constraints such as installation limitations, interference from other electronic devices, privacy concerns, and difficulty in responding to gas leakage incidents. To overcome these challenges, the proposed system employs LTE Cat-M1, a low-power wide-area technology operating on commercial cellular networks, enabling low-power, long-range, and reliable data transmission. A prototype was implemented using an Arm-based SoC board with an integrated multi-sensor smart meter. The multi-sensor module collects flow, temperature, pressure, and image data, which are used to refine and validate metering information. Experimental results confirm that metering data can be reliably transmitted via LTE Cat-M1 and effectively managed by the Meter Data Management System (MDMS), which provides real-time visualization and monitoring. The collected data can be effectively utilized by users to check gas usage and detect anomalies in the metering status.

Fully Homomorphic Encryption (FHE) allows computations on encrypted data without decryption, providing strong security for sensitive information. However, computational and memory demands for FHE are significant challenges, particularly in the Number Theoretic Transform (NTT) phase. This paper presents three efficient Twiddle Factor Generators (TFGs) to address these challenges: the Half-Memory TFG, the On-the-fly Serial TFG, and the On-the-fly Parallel TFG. The Half-Memory TFG reduces memory usage by storing only half of the twiddle factors and calculating the rest as needed. The On-the-fly Serial TFG eliminates memory requirements by computing twiddle factors, while the On-the-fly Parallel TFG enhances computational speed through parallel processing. Implemented on the FPGA KCU105 board, these TFGs demonstrated significant improvements in hardware resource utilization and computational efficiency. The Half-Memory TFG effectively reduces memory footprint, the On-the-fly Serial TFG eliminates memory usage with acceptable computational overhead, and the On-the-fly Parallel TFG offers superior performance for high-throughput applications. These innovations make FHE more practical for real-world applications, contributing to the broader goal of enabling secure, privacy-preserving computations on encrypted data.

This paper introduces an innovative Interpolation-based Radar Simulation System (IRSS) designed to simulate Doppler frequencies across multiple frequencies with minimal hardware complexity. Traditional radar simulation systems, such as Analog Radar System Simulators (ARSS) and Digital Radar System Simulators (DRSS), face challenges when supporting multi-frequency simulations due to the need for parallel processing of individual Doppler frequencies. The proposed IRSS exploits linear interpolation and superposition property, enabling a single interpolation process to handle multiple frequency components efficiently. The IRSS structure was implemented using an FPGA-based USRP, and its performance was evaluated through experim-ental testing. The results demonstrated that the IRSS accurately generated Doppler frequencies for both single and multi-frequency signals, maintaining consistency with theoretical predictions. The system effectively simulated Doppler shifts for various target speeds while preserving hardware simplicity, unlike traditional simulators that require increased resources proportional to the number of frequencies. This research highlights the advantages of using linear interpolation to reduce hardware complexity and improve scalability in radar simulators. Consequently, the proposed IRSS provides a cost-effective and efficient solution for modern radar systems that demand multi-frequency capabilities, making it well-suited for applications in complex environments such as autonomous vehicles, military operations, and aviation.

This paper presents the efficient digital Ex-core Neutron Flux Monitoring System (ENFMS) based on Field Programmable Gate Array (FPGA), designed to precisely measure reactor power levels across a wide operational range from 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−8</sup> % to 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> %. Conventional analog based ENFMS inherently suffers from low system performance, complex maintenance, susceptibility to environmental noise, and issues related to chip obsolescence. To address these challenges, the proposed system employs FPGA based digital signal processing, implementing three optimized measurement modes, namely Pulse, Mean Square Value (MSV), and Current, to effectively cover the entire operational range. A linear interpolation algorithm also provides smooth and continuous transitions between overlapping modes. Furthermore, the System on Chip (SoC) architecture integrates all signal processing functions onto a single FPGA chip, significantly reducing system size, complexity, and power consumption. Experimental evaluations performed on a Xilinx Kintex UltraScale FPGA platform demonstrated a short latency of approximately 3.49 μs at a 500 MHz clock frequency, high data throughput of 8.0 GB/s, and power consumption of about 6.3 W. Moreover, the system exhibited excellent measurement accuracy with a low RMS error of 0.0197 V throughout the entire operational range. Consequently, the proposed digital ENFMS significantly improves potential applicability, accuracy, and maintainability, making it well suited not only for existing nuclear instrumentation systems but also for emerging reactor technologies such as Small Modular Reactors (SMRs).