A. 1.8-V 128-Mb mobile DRAM with double boosting pump, hybrid current sense amplifier, and dual-referenced adjustment scheme for temperature sensor

A CMOS transceiver for DRAM bus system with a demultiplexed equalization scheme

FULL-SWING CMOS OUTPUT DRIVER USING ON-CHIP CAPACITORS, WITH FAST RISE TIME AND SMALL OVERSHOOT"

A 1-Gb/s bidirectional I/O buffer using the current-mode scheme

Adaptive biasing folded cascode CMOS OP amp with continuous-time push-pull CMFB scheme

Analysis and prevention of DRAM latch-up during power-on

A 1.03MOPS/W Lattice-based Post-quantum Cryptography Processor for IoT Devices

A 87.5-dB-SNDR Residue-integrated SAR ADC with a Digital-domain Capacitor Mismatch Calibration

A 62.6-pJ/Conversion Temperature Sensor with a Capacitor Voltage Division

Fully differential ROIC for SNR enhancement by using a MEMS microphone pair with a differential AC bias and a high-voltage DC bias