This paper presents a fully dynamic discrete-time (DT) delta-sigma modulator (DSM) leveraging a floating inverter amplifier (FIA)-based dynamic loop filter and digital noise coupling (DNC) to enhance the power efficiency of the DT DSM for various sensor applications. Fabricated in a 28-nm CMOS process, the proposed architecture achieves 98.6-dB SNDR in 25-kHz bandwidth (BW), while consuming only$71.7\mu \mathrm{W}$operating at 6.4 MS/s, resulting in Schreier Figure of Merit (${FoM}_{\text{S}}$of 184 dB and Walden FoM (${FoM}_{\text{W }}$) of 20.6 fJ/conv.-step.