발행물
컨퍼런스
제20회 휴먼테크논문대상 (The 20th Humantech Paper Award)
2013
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A 2GHz 130mW Direct-Digital Frequency Synthesizer with a Nonlinear DAC in 55nm CMOS
ITC-CSCC 2013
Low-Power Pipelined Phase Accumulator for High-Speed Direct Digital Frequency Synthesizers
ITC 2012
2012
A Low-Power High-Speed Pipelined Phase Accumulator with 2-Stage Pre-Skewing Registers
A Reference-Less 2.5 Gbps Half-Rate Burst-Mode Clock and Data Recovery for Optical Communication Systems
IEEE ASICON 2011
2011
A 10-Bit, 50 MS/s, 55 fJ/conversion-step SAR ADC with split capacitor array