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151
A Low-Power 1.85 GHz 32-Bit Carry Lookahead Adder Using Dual Path All-N-Logic
백광현
Proceedings of 2004 IEEE International Symposium on Circuits and Systems (ISCAS), 200405
152
1-GS/s, 12-Bit SiGe BiCMOS D/A Converter for High-Speed DDFS
백광현
Proceedings of 2003 IEEE International Symposium on Circuits and Systems (ISCAS), 200305
153
Exponential Split Accumulator for High-Speed Reduced Area Low-Power Direct Digital Frequency Synthesizers
백광현
Proceedings of 2003 ACM/SIGDA Great Lakes symposium on VLSI (GLSVLSI), 200304
154
Addressing a High-Speed D/A Converter Design for Mixed-Mode VLSI Systems
백광현
Proceedings of 2003 IEEE Southwest Symposium on Mixed-Signal Design, 200302
155
An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters
백광현
Proceedings of 2003 IEEE Computer Society Annual Symposium on VLSI, 200302
156
Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers
백광현
Proceedings of IEEE/ACM SIGDA International Conference on VLSI Design, 200301
157
High Speed CMOS Circuits with Parallel Dynamic Logic and Speed-enhanced Skewed Static Logic
백광현
IEEE Tran. on Circuits and Systems II - 직접입력, 200206
158
EXODUS: An inter-module bus-encoding scheme for silicon-on-a-chip
백광현
Electronics Letters - 직접입력, 200003
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