A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100x for Storage Class Memory Applications
김상범, Khwa, WS, Chang, MF, Wu, JY, Lee, MH, Su, TH, Yang, KH, Chen, TF, Wang, TY, Li, HP, Brightsky, M, Lung, HL, Lam, C
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 201701