발행물
컨퍼런스
MWSCAS23
2023
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An Energy Efficient 7.59-ENOB 50 MS/s Flash-SAR ADC in 65-nm CMOS
ITC-CSCC 2023
Optimizing Hardware Resources for Low-Power Binary Neural Networks Using Approximate Bitwise Operation
ICCE-Asia
2022
High-speed Comparator in 65-nm CMOS with Rail-to-rail Detection
High-speed BNN Design in HLS with Optimized Classification and Computation Method
ISOCC
Low Power Ternary XNOR using 10T SRAM for In-Memory Computing