발행물
컨퍼런스
IEEE Proceedings of ISOCC
2022
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Low Power Ternary XNOR using 10T SRAM for In-Memory Computing
A High-Performance, Low-Power 8-Bit Full-Adder Using 8+T Differential SRAM for Computation-in-Memory
Automated Reverse Engineering Tools for FPGA Bitstream Extraction and Logic Estimation
Data extraction from flash memory and reverse engineering using Xilinx 7 series FPGA boards
Hybrid Assistive Circuit of SRAM for Improving Read and Write Noise Margin in 3nm CMOS