A Fully Synthesizable Fractional-N Digital Phase-Locked Loop with a Calibrated Dual-Referenced Interpolating Time-to-Digital Converter to Compensate for Process-Voltage-Temperature Variations
Kim Shinwoong, Kim Seojin, Kim Youngsik, Son Hyunwoo
ELECTRONICS, 2024
2
A 0.055 mm2 Total Area Triple-Loop Wideband Fractional-N All-Digital Phase-Locked Loop Architecture for 1.9-6.1 GHz Frequency Tuning