,

FPGA Realization of Lane Detection Unit using Sliding-based Parallel Segment Detection for Buffer Memory Reduction

,

Continuous Differential Image-based Fast Convolution for Convolutional Neural Network

,

Lightweighted CTS Preconstruction Techniques for Checking Clock Tree Synthesizable Paths in RTL Design Time

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Low-Power LiDAR Signal Processor with Point-of-Cloud Transformation Accelerator

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An Integrated Bus Routing Control Platform for Autonomous Bus Driving based on Traffic-Demand Trade-off