In this study, we plan to design an RRAM TEG module for new device verification using an array size of 512 rows x 512 columns using 1T1R active RRAM cells based on MagnaChip $0.18\mu \mathbf{mG}$ process technology. We also plan to use 3.3V devices as select transistors used in TEG modules, which are analog circuits, and ${\mathbf{TaO}}_{\mathbf{x}}/{\mathbf{Ta}}_2{\mathbf{O}}_5$ will be used for new memristor devices.