발행물
컨퍼런스
IEEE Asian Solid-State Circuits Conference (ASSCC)
2011
,
Digital-Domain Calibration of Split-Capacitor DAC with no Extra Calibration DAC for a Differential-Type SAR ADC
International Technical Conference on Circuits/Systems, Computers and Communications
Reduction in the Peak Frequency Spectrum of Clock-Embedded Data-Signal for TFT-LCD Compared With the Regular-Clock and PRBS-Data Signals
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits
IEEE International Solid-State Circuits Conference (ISSCC)
1970
A 1 GHz ADPLL with a 1.25ps Minimum-Resolution Sub-Exponent TDC in 0.18μm CMOS
IEEE Symposium on VLSI Technology and Circuits (VLSI)
A 1.3μW 0.6V 8.7-ENOB Successive Approximation ADC in a 0.18μm CMOS