발행물
컨퍼런스
IEEE International Solid-State Circuits Conference (ISSCC)
2021
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A 104fsRMS-Jitter and −61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancellation Technique
IEEE International Solid-State Circuits (ISSCC)
2019
A 76fsRMS-Jitter and −40dBc-Integrated-Phase-Noise 28−31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL
IEEE Symp. VLSI Circuits Dig.
A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer
IEEE European Solid-State Circuits Conference (ESSCIRC)
2018
A 320uV-Output Ripple and 90ns-Settling Time at 0.5V Supply Digital-Analog-Hybrid LDO Using Multi-Level Gate-Voltage Generator and Fast-Decision PD Detector
2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)
An External-Capacitor-Less High-PSR Low-Dropout Regulator Using an Adaptive Supply-Ripple Cancellation Technique to the Body-Gate