발행물
컨퍼런스
2009년도 SoC학술대회
2009
,
광통신용 40Gb/s Concatenated BCH 복호기 구조
IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS, art. no.
2008
Flexible LDPC decoder architecture for high-throughput applications
40-Gb/s two-parallel reed-solomon based forward error correction architecture for optical communications
2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2008)
A high performance four-parallel 128/64-point radix-24 FFT/IFFT processor for MIMO-OFDM systems
International SoC Design Conference
100-Gb/s Three-Parallel Reed-Solomon based Forward Error Correction Architecture for Optical Communications