발행물
컨퍼런스
IEEE 2007 Silicon Nanoelectronics Workshop
2011.06
,
Self-Aligned Vertical Channel Split-Gate (VCSG) SONOS Flash Memory with Stair-Channel Structure Fabricated by Two-Step Si Etching Process
Program Characteristic Improvement in Cone Type SONOS Memory Structure
2-bit Recessed Channel Nonvolatile Memory Device with Lifted Charge Trapping Node Scheme
International Technical Conference on Circuits/Systems, Computers and Communications
Design of Gated Twin-Bit (GTB) NAND Flash Memory Considering Gate Induced Drain Leakage (GIDL) Current
Single Electron Transistor with P-type Sidewall Spacer Gates and SONOS Structure