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41
Design optimization of a 10 GHz low noise amplifier with gate drain capacitance consideration in 65 nm CMOS technology
Hakchul Jung, Hee‐Sauk Jhon, Ickhyun Song, Minsuk Koo, Hyungcheol Shin
2008
42
A concurrent dual-band CMOS low-noise amplifier for ISM-band application
Hee Sauk Jhon, Hakchul Jung, Minsuk Koo, Hyungcheol Shin
2008
43
A low power low noise amplifier with subthreshold operation in 130 nm CMOS technology
Ickhyun Song, Hee‐Sauk Jhon, Hakchul Jung, Minsuk Koo, Hyungcheol Shin
Microwave and Optical Technology Letters, 2008
44
A 2.4 GHz CMOS ultra low power low noise amplifier design with 65 nm CMOS technology
Minsuk Koo, Hakchul Jung, Ickhyun Song, Hee‐Sauk Jhon, Hyungcheol Shin
2008
45
24GHz Low Noise Amplifier Design in 65nm CMOS Technology with Inter-Stage Matching Optimization(Session8B: High-Frequency, Photonic and Sensing Devices)
Ickhyun Song, Hakchul Jung, Hee‐Sauk Jhon, Minsuk Koo, Hyungcheol Shin
SIAM International Conference on Data Mining, 2008
46
Low Power Ultrawideband Low Noise Amplifier Design Using 0.18-㎛ Mixed-Signal CMOS Process
Ickhyun Song, Hee‐Sauk Jhon, Hakchul Jung, Minsuk Koo, Yehao Shen, Hyungcheol Shin
대한전자공학회 학술대회, 2008
47
Small size low noise amplifier with suppressed noise from gate resistance
Ickhyun Song, Hee‐Sauk Jhon, Hakchul Jung, Minsuk Koo, Hyungcheol Shin
Microwave and Optical Technology Letters, 2008
48
24GHz Low Noise Amplifier Design in 65nm CMOS Technology with Inter-Stage Matching Optimization
Ickhyun Song, Hakchul Jung, Hee‐Sauk Jhon, Minsuk Koo, Hyungcheol Shin
IEICE Technical Report; IEICE Tech. Rep., 2008
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