Abstract In today's era of rapid data proliferation, interconnect bottlenecks pose major challenges for conventional binary computing systems. These challenges encompass not only managing vast data volumes but also the substantial power consumption associated with data processing. To address these limitations, ternary logic systems have attracted considerable interest due to their capability to process information at higher densities within the same physical footprint compared to binary logic systems. Here, scalable ternary logic devices are demonstrated that are fully compatible with complementary‐metal‐oxide‐semiconductor (CMOS) technology. These devices are based on p‐n heterojunction thin‐film transistors (TFTs) composed of InGaSnO and TeO X , fabricated using a low processing temperature of 150 °C. The resulting heterojunction TFTs exhibit highly reproducible negative differential transconductance behavior with a peak‐to‐valley current ratio exceeding 10 3 . By monolithically integrating these high‐performance p‐n heterojunction TFTs with p‐channel TeO X TFTs, ternary logic devices are demonstrated. The optimized device architecture facilitates sophisticated transconductance matching, enabling the realization of a stable intermediate logic state. The use of low‐temperature, CMOS‐compatible processes ensures scalability and industrial compatibility, highlighting oxide semiconductors as a compelling material platform for next‐generation ternary logic technologies. This work is a pivotal advancement toward energy‐efficient, high‐density ternary systems, paving the way for transformative computational paradigms.

Analog reservoir computing (ARC) systems have attracted attention owing to their efficiency in processing temporal information. However, the distinct functionalities of the system components pose challenges for hardware implementation. Herein, we report a fully integrated ARC system that leverages material versatility of the ferroelectric-to-mixed phase boundary (MPB) hafnium zirconium oxides integrated onto indium-gallium-zinc oxide thin-film transistors (TFTs). MPB-based TFTs (MPBTFTs) with nonlinear short-term memory characteristics are utilized for physical reservoirs and artificial neuron, while nonvolatile ferroelectric TFTs mimic synaptic behavior for readout networks. Furthermore, double-gate configuration of MPBTFTs enhances reservoir state differentiation and state expansion for physical reservoir and processes both excitatory and inhibitory pulses for neuronal functionality with minimal hardware burden. The seamless integration of ARC components on a single wafer executes complex real-world time-series predictions with a low normalized root mean squared error of 0.28. The material-device co-optimization proposed in this study paves the way for the development of area- and energy-efficient ARC systems.

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low-temperature processibility with conventional complementary-metal-oxide-semiconductor-compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high-end liquid crystal display devices and has now become a standard backplane electronic for organic light-emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next-generation electronics such as back-end-of-line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short-channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next-generation electronics are discussed.

Amorphous oxide semiconductors have become the industry standard for display backplanes, but their limited mobility necessitates complex low-temperature polycrystalline oxide (LTPO) stacks, increasing cost and reducing yield. To realize a practical oxide-only backplane that can serve as both drive and switching transistors, a channel combining high mobility, low off current, and robust stability is required. Here, we report zinc-free crystalline indium-gallium oxide (IGO) thin-film transistors (TFTs) that crystallize below 400 °C with preferential (222) orientation. By tuning the In:Ga ratio, an amorphous-to-crystalline transition is achieved, enhancing mobility to 83.3 cm² V^-1 s^-1 while maintaining an off-current of ≈10^-13 A. The optimized crystalline IGO TFTs (In:Ga = 12:3) exhibit the smallest threshold-voltage shift (<0.5 V) under bias stress and reproducible electrical characteristics across multiple devices. Furthermore, we provide experimental investigation of the observed stability by analyzing the trap density of states (TDOS) near both the valence-band maximum (VBM) and conduction-band minimum (CBM) using a combined optoelectronic approach based on photoexcited charge collection spectroscopy (PECCS) and photoresponse capacitance-voltage (C-V). The complementary analysis reveals that crystalline IGO stabilizes oxygen-vacancy-related states closer to the conduction band, with the extracted TDOS evolution showing self-consistent correlation with the measured bias-stress-induced electrical behavior. Circuit-level validation with a complementary inverter confirms stable gain and noise margins. These results establish crystalline IGO as a viable single-material oxide channel combining high mobility, robust bias stability, and simplified processing for next-generation oxide-only backplanes.

Crystalline oxide semiconductors are promising back-end-of-line (BEOL)-compatible channel materials for AI hardware, yet their nanoscale trap physics remains unclear. Here, we directly mapped and quantified mobility (μ), trap density (<i>N</i>_eff), and trap depth in amorphous/nanocrystalline (a/n-) and polycrystalline (p-) In₂O₃ films using scanning noise microscopy with finite-element analysis. A/n-In₂O₃ exhibited large local variations in μ and <i>N</i>_eff with deep trap states (∼0.24 eV). Upon full crystallization, p-In₂O₃ exhibited uniform μ and <i>N</i>_eff with shallow trap states at grains (∼0.10 eV) and grain boundaries (∼0.12 eV). Crystallization effectively eliminated structural-disorder-induced deep states, leaving only shallow donor-like oxygen vacancy traps. This led to enhanced μ and significantly reduced <i>N</i>_eff (and trap depth), exhibiting uniform spatial distributions with minute changes at grain boundaries. Furthermore, p-In₂O₃ devices achieved higher mobility, more positive threshold voltage, and improved bias stability, confirming reduced deep-trap activity and enhanced charge-transport uniformity. This work establishes a direct link between structural ordering, local trap-depth modulation, and macroscopic electrical performances of crystalline oxide channels.

The data processing demands of the digital era have exposed limitations in conventional memory architectures. Gain cell-embedded dynamic random-access memory based on oxide semiconductors is emerging as a solution, addressing scalability, power efficiency, and integration density challenges. Our review highlights that oxide semiconductors offer exceptional properties for gain cell memory applications, including ultra-low leakage currents and wide bandgap characteristics, while their advanced structures like gate-all-around and channel-all-around stacked architectures demonstrate the potential for high-density integration. While challenges in manufacturing and reliability persist, this paradigm shift in memory design holds promise for reshaping computing systems for artificial intelligence and advanced computing applications.

ABSTRACT High‐mobility (&gt;200 cm 2 V −1 s −1 ) transparent top gate amorphous InGaZnO (a‐IGZO) thin‐film transistors (TFTs) are demonstrated using an oxidized Nb capping layer. The Nb capping layer promotes oxygen out‐diffusion from the a‐IGZO channel, which in turn generates oxygen vacancies that serve as shallow donors. The partial capping structure selectively modulates carrier density, where the oxygen vacancy‐rich, low‐resistance region strengthens percolation conduction to enhance mobility, while the uncapped region acts as in‐channel potential barriers to maintain ultra‐low off‐current. The top gate architecture with an Al 2 O 3 /NbO x gate stack strengthens electrostatic control and suppresses drain‐induced barrier lowering (λ DIBL = 6 mV V −1 ). The resulting device achieves a maximum field‐effect mobility of 202 cm 2 V −1 s −1 , a near‐zero threshold voltage, and stable operation under bias stress, while maintaining optical transmittance above 87% in the visible range. This approach provides a scalable and process compatible route for integrating high‐mobility oxide thin‐film transistors into transparent and low‐power display backplanes, enabling the potential replacement of low‐temperature polycrystalline silicon (LTPS) driving transistors in high‐refresh‐rate, high‐brightness active‐matrix organic light‐emitting diode (AMOLED) applications.

With conventional silicon-based devices approaching their physical scaling limits and traditional perovskite ferroelectrics facing complementary metal-oxide-semiconductor (CMOS) compatibility challenges, the development of alternative material integrations is essential for next-generation semiconductor systems. Among these, the synergistic integration of oxide semiconductors (OSs) with HfO₂-based ferroelectrics has emerged as a particularly promising approach, leveraging the superior interfacial properties, excellent uniformity, and compatibility with low-temperature fabrication processes inherent to OS channels. However, realizing the full potential of this technology requires a comprehensive understanding of its synergistic benefits across diverse applications and overcoming the challenges of scaling from individual devices to complex and large-scale arrays. In this review, we provide a comprehensive overview of recent progress in OS-based ferroelectric field-effect transistors (FeFETs) across five key application domains: flash memory, dynamic random-access memory (DRAM), neuromorphic computing, logic, and displays. We examine how the unique advantages of this integration address the fundamental limitations of conventional technologies in each area and conclude by discussing the remaining technical barriers and future research directions for practical implementation of the technology.

Abstract In today's era of rapid data proliferation, interconnect bottlenecks pose major challenges for conventional binary computing systems. These challenges encompass not only managing vast data volumes but also the substantial power consumption associated with data processing. To address these limitations, ternary logic systems have attracted considerable interest due to their capability to process information at higher densities within the same physical footprint compared to binary logic systems. Here, scalable ternary logic devices are demonstrated that are fully compatible with complementary‐metal‐oxide‐semiconductor (CMOS) technology. These devices are based on p‐n heterojunction thin‐film transistors (TFTs) composed of InGaSnO and TeO X , fabricated using a low processing temperature of 150 °C. The resulting heterojunction TFTs exhibit highly reproducible negative differential transconductance behavior with a peak‐to‐valley current ratio exceeding 10 3 . By monolithically integrating these high‐performance p‐n heterojunction TFTs with p‐channel TeO X TFTs, ternary logic devices are demonstrated. The optimized device architecture facilitates sophisticated transconductance matching, enabling the realization of a stable intermediate logic state. The use of low‐temperature, CMOS‐compatible processes ensures scalability and industrial compatibility, highlighting oxide semiconductors as a compelling material platform for next‐generation ternary logic technologies. This work is a pivotal advancement toward energy‐efficient, high‐density ternary systems, paving the way for transformative computational paradigms.

Analog reservoir computing (ARC) systems have attracted attention owing to their efficiency in processing temporal information. However, the distinct functionalities of the system components pose challenges for hardware implementation. Herein, we report a fully integrated ARC system that leverages material versatility of the ferroelectric-to-mixed phase boundary (MPB) hafnium zirconium oxides integrated onto indium-gallium-zinc oxide thin-film transistors (TFTs). MPB-based TFTs (MPBTFTs) with nonlinear short-term memory characteristics are utilized for physical reservoirs and artificial neuron, while nonvolatile ferroelectric TFTs mimic synaptic behavior for readout networks. Furthermore, double-gate configuration of MPBTFTs enhances reservoir state differentiation and state expansion for physical reservoir and processes both excitatory and inhibitory pulses for neuronal functionality with minimal hardware burden. The seamless integration of ARC components on a single wafer executes complex real-world time-series predictions with a low normalized root mean squared error of 0.28. The material-device co-optimization proposed in this study paves the way for the development of area- and energy-efficient ARC systems.