,

Two Orders of Magnitude Reduction of Low Voltage SRAM’s by Row-by-Row Dynamic VDD Control (RDDV) Scheme

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Zigzag Super Cut-off CMOS (ZSCCMOS) Scheme with Self-Saturated Virtual Power Lines for Subthreshold-Leakage-Suppressed Sub-1-V-VDD LSI’s

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A multi-stage CMOS charge pump for low-voltage memories

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CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits

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A post-package bit-repair scheme using static latches with bipolar-voltage programmable antifuse circuit for high-density DRAMs