발행물
컨퍼런스
IEEE International Symposium on Circuit and Systems (ISCAS), June 2014
1970
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An 1.61mW Mixed-Signal Column Processor for Brisk Feature Extraction in CMOS Image Sensor
IEEE System-on-Chip Conference (SOCC), Sep. 2017
A 1.41mW On-chip/Off-chip Hybrid Transposition Table for Low-power Robust Deep Tree Search in Artifiicial Intelligence SoCs
IEEE Hot Chips Symposium (HCS), Aug. 2017
DNPU: An Energy-Efficient Deep Neural Network Processor with On-Chip Stereo Matching
IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), Apr. 2017
An Energy-Efficient Deep Learning Processor with Heterogeneous Multi-Core Architecture for Convolutional Neural Networks and Recurrent Neural Networks
IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2017
DNPU: An 8.1 TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks