발행물
컨퍼런스
International Conference on VLSI and CAD
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A Fast Lock-On Time Mixed Mode DLL with 10ps Jitter
IEEE Asia Pacific Conference on ASICs
A VPM Architecture for a Fast Row-Cycle DRAM
한국 반도체 학술 대회
ramP(RAM Processor)를 위한 Embedded RISC Core의 설계
제 5회 한국반도체 학술대회
High Speed Registor File DRAM with Two Pages of Register File for an Application to Embedded Memory Logic
High Speed Register File DRAM(RFDRAM) with 2 Pages of Register Files for Embedded Memory Logic