발행물
컨퍼런스
IEEE System-on-Chip Conference (SOCC)
2017.09
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A 1.41mW On-chip/Off-chip Hybrid Transposition Table for Low-power Robust Deep Tree Search in Artifiicial Intelligence SoCs
IEEE Hot Chips Symposium (HCS)
2017.08
DNPU: An Energy-Efficient Deep Neural Network Processor with On-Chip Stereo Matching
IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips)
2017.04
An Energy-Efficient Deep Learning Processor with Heterogeneous Multi-Core Architecture for Convolutional Neural Networks and Recurrent Neural Networks
IEEE International Solid-State Circuits Conference (ISSCC)
2017.02
DNPU: An 8.1 TOPS/W Reconfigurable CNN-RNN Processor for General-Purpose Deep Neural Networks
IEEE Symposia on VLSI Technlogy and Circuits (SoVC)
2015.06
A 33 nJ/vector Descriptor Generation Processor for Low-power Object Recognition