1970

,

Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-NetworkAuthor

1970

,

An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC with Switchable nvSRAM Compute-in-Memory MacroAuthor

1970

,

A 28.6 mJ/iter Stable Diffusion Processor for Text-to-Image Generation with Patch Similarity-Based Sparsity Augmentation and Text-Based Mixed-PrecisionAuthor

1970

,

A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator with Delta-Based Weight Sharing and Block-Mantissa Reconfigurable Pe ArrayAuthor

1970

,

A 3.55 mJ/Frame Energy-Efficient Mixed-Transformer Based Semantic Segmentation Accelerator for Mobile DevicesAuthor