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11
A 28-nm 10-b 2.2-GS/s 18.2-mW Relative-Prime Time-Interleaved Sub-ranging SAR ADC with On-Chip Background Skew Calibration
Dong-Jin Chang, Michael Choi, Seung-Tak Ryu
IEEE, JSSC, 2021
12
An 8-bit 1-GS/s Asynchronous Loop-Unrolled SAR-Flash ADC with Complementary Dynamic Amplifiers in 28-nm CMOS
Dong-Ryeol Oh, Kyoung-Jun Moon, Won-Mook Lim, Ye-Dam Kim, Eun-Ji An, Seung-Tak Ryu
IEEE, JSSC, 2020
13
Compact Mixed-Signal Convolutional Neural Network Using a Single Modular Neuron
Dong-Jin Chang, Byeong-Gyu Nam, Seung-Tak Ryu
IEEE TCAS-I, 2020
14
A Single-Supply CDAC-Based Buffer-Embedding SAR ADC with Skip-Reset Scheme having Inherent Chopping Capability
Min-Jae Seo, Dong-Hwan Jin, Ye-Dam Kim, Jong-Pal Kim, Seung-Tak Ryu
IEEE JSSC, 2020
15
A 28-nm CMOS 12-bit 250-MS/s Voltage-Current-Time Domain 3-Stage Pipelined ADC
Kyoung-Jun Moon, Dong-Ryeol Oh, Michael Choi, Seung-Tak Ryu
IEEE TCAS-II, 2020
16
A 40nm CMOS 12b 120MS/s Nonbinary SAR-assisted SAR ADC with Double Clock-Rate Coarse Decision
Yi-Ju Roh, Dong-Jin Chang, Seung-Tak Ryu
IEEE TCAS-II, 2020
17
A 9.1-ENOB 6-mW 10-bit 500-MS/s Pipelined-SAR ADC with Current-Mode Residue Processing in 28-nm CMOS
Kyoung-Jun Moon, Dong-Shin Jo, Wan Kim, Michael Choi, Hyung-Jong Ko, Seung-Tak Ryu
IEEE JSSC, 2019
18
A 40nm CMOS 7b 32GS/s SAR ADC with Background Channel Mismatch Calibration
Dong-Shin Jo, Ba-Ro-Saim Sung, Min-Jae Seo, Woo-Cheol Kim, Seung-Tak Ryu
IEEE TCAS-II, 2019
19
A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers
Dong-Hwan Jin, Ji-Wook Kwon, Min-Jae Seo, Mi-Young Kim, Min-Chul Shin, Seok-Joon Kang, Jung-Hyuk Yoon, Taek-Seung Kim, Seung-Tak Ryu
IEEE JSSC, 2019
20
A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8x Time-Domain Interpolating Flash ADC with Sequential Slope-Matching Offset Calibration
Dong-Ryeol Oh, Jong-In Kim, Dong-Shin Jo, Woo-Chul Kim, Dong-Jin Chang, Seung-Tak Ryu
IEEE JSSC, 2018
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