발행물

전체 논문

104

21

Pseudo-linear Analysis of Bang-bang Controlled Timing Circuits
Myeong-Jae Park, Jaeha Kim
IEEE Trans. Circuits and Systems I (TCAS-I), 2013

22

Equalizer Design and Performance Trade-offs in ADC-based Serial Links
J. Kim, E.-H. Chen, J. Ren, B. S. Leibowitz, P. Satarzadeh, J. L. Zerbe, C.-K. K. Yang
IEEE Trans. Circuits and Systems I (TCAS-I), 2011

23

Fast, Non-Monte-Carlo Estimation of Transient Performance Variation Due to Device Mismatch
J. Kim, K. D. Jones, M. A. Horowitz
IEEE Trans. Circuits and Systems I (TCAS-I), 2010

24

Design Optimization of On‐chip Inductive Peaking Structures for 0.13‐um CMOS 40‐Gb/s Transmitter Circuits
J. Kim, J.‐K. Kim, B.‐J. Lee, D.‐K. Jeong
IEEE Trans. Circuits and Systems I (TCAS-I), 2009

25

Simulation and Analysis of Random Decision Errors in Clocked Comparators
J. Kim, B. S. Leibowitz, J. Ren, C. J. Madden
IEEE Trans. Circuits and Systems I (TCAS-I), 2009

26

On‐Chip Measurement of Jitter Transfer and Supply Sensitivity of PLL/DLLs
J. Kim
IEEE Trans. Circuits and Systems II (TCAS-II), 2009

27

A Fully Integrated 0.13‐um CMOS 40‐Gb/s Serial Link Transceiver
J.‐K. Kim, J. Kim, G. Kim, D.‐K. Jeong
IEEE J. Solid‐State Circuits (JSSC), 2009

28

Adaptive‐Bandwidth Phase‐Locked Loop with Continuous Background Frequency Calibration
J. Kim
IEEE Trans. Circuits and Systems II (TCAS-II), 2009

29

Reduction of Pump Current Mismatch in Charge‐Pump PLL
M.‐S. Hwang, J. Kim, D.‐K. Jeong
IET Electronics Letters, 2009

30

A Single‐Pair Serial Link for Mobile Displays for Clock Edge Modulation Scheme
W.‐J. Choe, B.‐J. Lee, J. Kim, D.‐K. Jeong, G. Kim
IEEE J. Solid‐State Circuits (JSSC), 2007