발행물
컨퍼런스
IEEE Proceedings of the 10th International SoC Design Conference – ISOCC 2013
2013
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Transistor Layout Optimization for Leakage Saving
Simple and Accurate Capacitance Modeling of 32nm Multi-fin FinFET
ACM/IEEE Proc. of International Workshop on System Level Interconnect Prediction (SLIP)
Performance Analysis for Interconnections of 3D IC Considering Frequency Dependent Effect of TSVs
SoC '13
Layout Optimization using Inverse Narrow Width Effect in 32nm CMOS
IEEE Proceedings of the 9th International SoC Design Conference – ISOCC 2012
2012
Partial-LastZ: An Optimized Hybridization Technique for 3D NoC Architecture Enabling Adaptive Inter-Layer Communication