A novel fabrication method for the nanoscale tunneling field effect transistor

Co-integration of nano-scale vertical- and horizontal-channel metal-oxide-semiconductor field-effect transistors for low power CMOS technology

Simulation study on scaling limit of silicon tunneling field-effect transistor under tunneling-predominance

Comparative study on top- and bottom-source vertical-channel tunnel field-effect transistors

Effects of conductive defects on unipolar RRAM for the improvement of resistive switching characteristics

Novel three dimensional (3D) NAND flash memory array having tied bit-line and ground select transistor (TiGer)

Study on threshold voltage control of tunnel field-effect transistors using VT-control doping region

Design of thin-body double-gated vertical-channel tunneling field-effect transistors for ultralow-power logic circuits

Mitigating imperfections in mixed-signal neuromorphic circuits

2C-Ternary Content Addressable Memory in Memcapacitor Crossbar Array with NAND Flash Structure