Logic-in-Memory Characteristics of Reconfigurable Feedback Field-Effect Transistors with Double-Gated Structure

Effects of interface states on electrical characteristics of feedback field-effect transistors

Disturbance Characteristics of 1T DRAM Arrays Consisting of Feedback Field-Effect Transistors

Prediction of Device Characteristics of Feedback Field-Effect Transistors Using TCAD-Augmented Machine Learning

Reconfigurable Logic-In-Memory Cell Comprising Triple-Gated Feedback Field-Effect Transistors

Effect of dual gating on electrical characteristics of amorphous indium-tin-gallium-zinc-oxide TFTs

Disturbance Characteristics of 1T DRAM Arrays Consisting of Feedback Field-Effect Transistors

Logic-In-Memory Characteristics of Reconfigurable Feedback Field-Effect Transistors with Double-Gated Structure

Effects of Interface States on Electrical Characteristics of Feedback Field-Effect Transistors

Logic-in-Memory Operation of Ternary NAND/NOR Universal Logic Gates using Double-Gated Feedback Field-Effect Transistors