DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), 2023.10
12
A Low-Power Graph Convolutional Network Processor with Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices
Sangjin Kim, Sangyeob Kim, Juhyoung Lee, Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems I (TCAS-I), 2022
13
An Energy-Efficient GAN Accelerator with On-Chip Training for Domain Specific Optimization
Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), 2021.07
14
A 64.1mW Accurate Real-time Visual Object Tracking Processor with Spatial Early Stopping on Siamese Network
Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), 2021.03
15
LOG-CIM: An Energy-Efficient Logarithmic Quantization Computing-In-Memory Processor with Exponential Parallel Data Mapping and Zero-Aware 6T Dual-WL Cell
Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), 2024.05
16
A 3.8-mW 1.9-mΩ/√Hz Electrical Impedance Tomography IC with High Input Impedance and Loading Effect Calibration for 3-D Early Breast Cancer Detect System
Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), 2024.05
17
A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory with Computation Reuse
Soyeon Um, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), 2021.03
18
A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection
Seokchan Song, Soyeon Kim, Gwangtae Park, Donghyeon Han, Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), 2022.03
19
Cache-PIM: An ECC-compatible eDRAM Processing-In-Memory for Last-Level Cache with Triple-level Error Correction
Sangwoo Ha, Soyeon Um, Sangjin Kim, Kyomin Sohn, Hoi-Jun Yoo
IEEE Journal of Solid-State Circuits (JSSC), 2025.05
20
A 36.2 dB High SNR and PVT/Leakage-robust eDRAM Computing-In-Memory Macro with Segmented BL and Reference Cell Array
Sangwoo Ha, Sangjin Kim, Donghyeon Han, Soyeon Um, Hoi-Jun Yoo
IEEE Transactions on Circuits and Systems II (TCAS-II), 2022.03