발행물

전체 논문

781

511

A 4-Gb/s Clock and Data Recovery Circuit Using Four-Phase 1/8-Rate ClockAuthor
Seong-Jun Song, Jaeseo Lee, Sung-Min Park, Hoi-Jun Yoo
ESSCIRC 2002, 2002

512

Low Power MPEG-4 Video Codec Hardware for Portable ApplicationsAuthor
Chi-Weon Yoon, Hoi-Jun Yoo
CoolChips 2002, 2002

513

A Multichip-on-Oxide 1.0Gb/s 80dBΩ Fully-Differential CMOS Transimpedance Amplifier for Optical Interconnect ApplicationsAuthor
Jaeseo Lee, Seong-Jun Song, Sung Min Park, Choong-Mo Nam, Young-Se Kwon, Hoi-Jun Yoo
ISSCC 2002, 2002

514

Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) ApplicationsAuthor
Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo
ASP-DAC 2002, 2002

515

SOC Design Approaches Optimized for VLSI Fabrication TechnologiesAuthor
Se-Jeong Park, Chi-Weon Yoon, Hoi-Jun Yoo
SCI 2001 ISAS 2001, 2001

516

120mW Embedded 3D Graphics Rendering Engine with 64Mb Logically Local Frame Buffer and 3.2GByte/s Run-time Reconfigurable Bus for PDA-ChipAuthor
Ramchan Woo, Chi-Weon Yoon, Jeonghoon Kook, Se-Joong Lee, Kangmin Lee, Yong-Ha Park, Hoi-Jun Yoo
S. VLSI 2001, 2001

517

Low Power Motion Compensation Block IP with embedded DRAM Macro for Portable Multimedia ApplicationsAuthor
Chi-Weon Yoon, Jeonghoon Kook, Ramchan Woo, Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo
S. VLSI 2001, 2001

518

480ps 64-bit Race Logic AdderAuthor
Se-Joong Lee, Ramchan Woo, Hoi-Jun Yoo
S. VLSI 2001, 2001

519

A Reconfigurable Multilevel Parallel Graphics Cache Memory with75 GB/s Parallel Cache Replacement BandwidthAuthor
Se-Jeong Park, Jeong-Su Kim, Ramchan Woo, Se-Joong Lee, Kang-Min Lee, Tae-Hum Yang, Jin-Yong Jung, …
S. VLSI 2001, 2001

520

Single Chip 3D Rendering Engine Integrating Embedded DRAM Frame Buffer and Hierarchical Octet Tree (HOT) Array Processor with Bandwidth AmplificationAuthor
Yong-Ha Park, Sun-Ho Han, Hoi-Jun Yoo (The outstanding Design Award)
ASP-DAC 2001, 2001