발행물

전체 논문

51

21

Compact Topology-aware Bus Routing for Design Regularity
D. Kim, S. Do, S. Lee, S. Kang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 202008

22

Proactive Scenario Characteristic-Aware Online Power Management on Mobile Systems
Han S., Yun Y., Kim Y.H., KANG, SH
IEEE ACCESS, 202004

23

SmartGrid: Video Retargeting With Spatiotemporal Grid Optimization
Lee, HS, Bae, G, Cho, SI, Kim, YH, Kang, S
IEEE ACCESS, 201909

24

Power Integrity Coanalysis Methodology for Multi-Domain High-Speed Memory Systems
S. Kang, S. Kim, K. Han, Y. Kim
IEEE Access, 201907

25

Ternary Full Adder Using Multi-Threshold Voltage Graphene Barristors
Heo, S, Kim, S, Kim, K, Lee, H, Kim, SY, Kim, YJ, Kim, SM, Lee, HI, Lee, S, Kim, KR, Kang, S, LEE, BH
IEEE Electron Device Letters, 201812

26

SoftCorner: Relaxation of Corner Values for Deterministic Static Timing Analysis of VLSI Systems
Kwon, H, Kim, JH, Kang, S, Kim, YH
IEEE Access, 201810

27

Statistical Leakage Analysis Using Gaussian Mixture Model
Kwon, H, Woo, M, Kim, YH, Kang, S
IEEE Access, 201809

28

Novel adaptive power-gating strategy and tapered TSV structure in multilayer 3D IC
Kim, S, Kang, S, Han, KJ, Kim, Y
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 201606

29

Synthesis of dual-mode circuits through library design, gate sizing, and clock-tree optimization
Kim, S, Kang, S, Shin, Y
ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 201606

30

Wakeup scheduling and its buffered tree synthesis for power gating circuits
Kim, S, Paik, S, Kang, S, Shin, Y
INTEGRATION-THE VLSI JOURNAL, 201603