Configurable Memory-Based NTT Architecture for Homomorphic Encryption

HLS를 이용한 FPGA기반 양자내성암호 하드웨어 가속기 설계

Configurable Encryption and Decryption Architectures for CKKS-Based Homomorphic Encryption

Hamming-Distance Trellis Min-Max-Based Architecture for Non-Binary LDPC Decoder

Pipelined Key Switching Accelerator Architecture for CKKS-Based Fully Homomorphic Encryption

Area-Efficient Number Theoretic Transform Architecture for Homomorphic Encryption

Area-Time Efficient Hardware Architecture for CRYSTALS-Kyber

Efficient First Four Minimum Values Finder for NB-LDPC Decoders With Compressed Messages

An Analysis of Hardware Design of MLWE-Based Public-Key Encryption and Key-Establishment Algorithms

Low-Complexity Multi-Size Circular-Shift Network for 5G New Radio LDPC Decoders