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전체 논문

120

41

Efficient Parallel Block-layered Nonbinary Quasi-cyclic Low-density Parity-check Decoding on a GPU
대한전자공학회, 2017

42

Two-Extra-Column Trellis Min-Max Decoder Architecture for Nonbinary LDPC Codes
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2017

43

High-throughput Low-complexity Mixed-radix FFT Processor using a Dual-path Shared Complex Constant Multiplier
IEEK PUBLICATION CENTER, RM #907 SCIENCE & TECHNOLOGY NEW BLDG, 635-4 YUCKSAM-DONG, SEOUL, SOUTH KOREA, KANGNAM-KU, 135-703, 2017

44

Low-Complexity Non-Iterative Soft-Decision BCH Decoder Architecture for WBAN Applications
IEEK PUBLICATION CENTER, RM #907 SCIENCE & TECHNOLOGY NEW BLDG, 635-4 YUCKSAM-DONG, SEOUL, SOUTH KOREA, KANGNAM-KU, 135-703, 2016

45

Efficient Algorithm and Architecture for Elliptic Curve Cryptographic Processor
IEEK PUBLICATION CENTER, RM #907 SCIENCE & TECHNOLOGY NEW BLDG, 635-4 YUCKSAM-DONG, SEOUL, SOUTH KOREA, KANGNAM-KU, 135-703, 2016

46

Simplified merged processing element for successive-cancellation polar decoder
IEE-INST ELEC ENG, 2016

47

Efficient multi-Gb/s multi-mode LDPC decoder architecture for IEEE 802.11ad applications
ELSEVIER SCIENCE BV, 2015

48

High-Throughput Low-Complexity Successive-Cancellation Polar Decoder Architecture using One's Complement Scheme
IEEK PUBLICATION CENTER, RM #907 SCIENCE & TECHNOLOGY NEW BLDG, 635-4 YUCKSAM-DONG, SEOUL, SOUTH KOREA, KANGNAM-KU, 135-703, 2015

49

Block-Layered Decoder Architecture for Quasi-Cyclic Nonbinary LDPC Codes
SPRINGER, 233 SPRING ST, NEW YORK, USA, NY, 10013, 2015

50

Pipeline-Aware QC-IRA-LDPC 부호 및 효율적인 복호기 구조
대한전자공학회, 2014