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컨퍼런스

전체 논문

22

1

Two-rank Decimation Technique for High-speed Time-interleaved Analog-to-digital Converters
S.- W. Oh, D.-R. Oh
Journal of Semiconductor Technology and Science(JSTS), 2025

2

Loop-unrolled SAR ADC with complementary voltage-to-time converters
D.- Y. Kim, S.- W. Oh, H.-G. Hwang, Y.- S. Kim, D.-R. Oh
The Institution of Engineering and Technology(IET), Lett., 2025

3

Power-efficient 4-bit 40-MS/s Time-domain 2-times Interpolating Flash ADC Using Complementary Latching Technique
B.-J. Kim, D.-R. Oh*
International Journal on Advanced Science Engineering Information Technology(IJASEIT), 2024

4

SAR-Assisted Energy-Efficient Hybrid ADCs
K. E. Lozada, D. -J. Chang, D. -R. Oh, M. -J. Seo, S. -T. Ryu
IEEE Open Journal of the Solid-State Circuits Society(OJ-SSCS), 2024

5

A 1.5-MHz BW 81.2-dB SNDR Dual-Residue Pipeline ADC With a Fully Dynamic Noise-Shaping Interpolating-SAR ADC
J.-H. Chung, Y.-D. Kim, C.-U. Park, K.-W. Park, D.-R. Oh, M.-J. Seo*, S.-T. Ryu*
IEEE J. Solid-State Circuits (JSSC), 2024

6

A 6-bit 20 GS/s Time-Interleaved Two-Step Flash ADC in 40 nm CMOS
D.-R. Oh*
MDPI Electronics, 2022

7

A 7-Bit Two-Step Flash ADC With Sample-and-Hold Sharing Technique
D.-R. Oh, M.-J. Seo, S.-T. Ryu*
IEEE J. Solid-State Circuits (JSSC), 2022

8

A 0.0012 mm2 6-bit 700 MS/s 1 mW Calibration-Free Pseudo-Loop-Unrolled SAR ADC in 28 nm CMOS
E.-J. An, D.-R. Oh*
MDPI Electronics, 2022

9

An 8-Bit 1-GS/s Asynchronous Loop-Unrolled SAR-Flash ADC With Complementary Dynamic Amplifiers in 28-nm CMOS
D.-R. Oh, K.-J. Moon, W.-M. Lim, Y.-D. Kim, E.-J. An, S.-T. Ryu*
IEEE J. Solid-State Circuits (JSSC), 2021

10

A 28-nm CMOS 12-Bit 250-MS/s Voltage-Current-Time Domain 3-Stage Pipelined ADC
K.-J. Moon, D.-R. Oh, M. Choi, S.-T. Ryu*
IEEE Trans. Circuits and Systems II (TCAS II), 2020