QD) layer, the device induces probabilistic trapping-de-trapping dynamics, producing random photospike currents under optical pulse trains. The spike currents show high entropy and enable multi-level random number generation beyond binary, providing ternary outputs with near-ideal statistics (33.30% uniformity, 33.28% inter-Hamming distance) and full success in all 15 NIST tests. We further develop an image authenticity verification system by integrating the PS-TRNG with a mobile platform and custom-designed circuit board, enabling hardware-based detection of unauthorized image modifications. The random numbers are embedded as a hidden layer within the image data without degrading visual quality, enabling detection of unauthorized modifications. The system can successfully identify image modifications, even those involving highly sophisticated manipulations generated by artificial intelligence (AI)-based image editing tools. The device maintains stable operation over 2 million cycles and remains reliable even after more than 460 days, demonstrating its long-term stability.

ion migration induce a phase transition, leading to sharp resistance switching and efficient spiking. This device successfully mimics key neuronal dynamics, including leaky integrate-and-fire, threshold tuning, and spatiotemporal dynamics, without requiring auxiliary reset circuits. Furthermore, SNN is constructed by integrating CIPS-based synaptic and neuron devices and evaluate face classification performance using an unsupervised learning approach, achieving a recognition accuracy of 95.83% via the lateral inhibition function of the neuron device. The findings highlight the potential of CIPS TS-FET as energy-efficient spiking neuron device applications for next-generation SNN-based neuromorphic computing systems.

The pursuit of hardware-based security solutions has highlighted the true random number generator (TRNG). Various physical phenomena, from noise generation to quantum physics complexities, have been explored for random number generation. The arc discharge light-induced TRNG (ALTRNG) is introduced, featuring wavelength-dependent photocurrent generation and arc discharge irradiation. A bipolar photo-responsive photodetector (BPPD) differentiates "1" and "0" states, producing highly random bits validated by the National Institute of Standards and Technology (NIST) 15 tests. The BPPD's response to deep-ultraviolet (DUV) and blue light enables distinct photocurrent generation under arc discharge illumination. The ALTRNG generates true random signals, yielding bit streams with unpredictability, uniform distribution, and stability. With a readout circuit achieving 2-kbps, wireless random number transmission is demonstrated, highlighting potential for secure password systems and artificial X-ray image generation.

Abstract Spiking neural networks (SNNs) represent a promising computing architecture for neuromorphic hardware, as they process and store information through spike signals, closely mimicking the way the human brain operates. However, most synaptic devices recently proposed for hardware SNN implementations are limited to exhibiting analogue tuning within a single conductance polarity, making them inadequate for realizing scalable and energy‐efficient neuromorphic systems. In this study, an optoelectronic synaptic device based on a ReS 2 /WSe 2 / h ‐BN heterostructure, enabling conductance modulation across both positive and negative states within a single device is demonstrated. This bidirectional plasticity originates from electrostatic modulation of the WSe 2 Fermi level, induced by voltage pulses applied through an O 2 plasma‐treated h ‐BN weight‐control layer. The device exhibits reversible photocurrent polarity, reliable potentiation/depression of the postsynaptic current, and stable synaptic weight retention with reproducible multi‐cycle operation. System‐level simulations using a 1024–20–3 SNN architecture confirmed the functional advantage of a bidirectional synapse, with networks achieving over 95% facial recognition accuracy within 20 training epochs, whereas the unidirectional synapse‐based network plateaued below 75%. These findings highlight the potential of optoelectronic synaptic device with bidirectional plasticity as a promising device platform for efficient on‐chip learning in next‐generation neuromorphic hardware system.

FET neurons and 2D FeFET synapses is constructed, which achieves high accuracy of 87.5% in a face classification task by unsupervised learning. The integration of a 2D SNN with 2D steep-switching spiking neuronal devices and 2D synaptic devices shows great potential for the development of neuromorphic systems with improved energy efficiency and computational capabilities.

The rapid growth of unstructured data in applications such as autonomous systems and edge AI underscores the urgent need for energy-efficient, real-time computing exemplified by biological brains, where synaptic weights are adjusted according to the timing of neural spikes, known as spike-timing-dependent plasticity (STDP). This work presents the first experimental realization of a multi-channel timing-dependent spiking neural network (TD-SNN) at the board-level by integrating photoelectroactive synaptic devices with an analog leaky integrate-and-fire (LIF) neuron circuit. The synaptic devices exploit the precise timing dependency between electrical presynaptic and optical postsynaptic spikes to emulate STDP, enabling reversible and bidirectional modulation of synaptic weights through photoelectroactive doping. By engineering the shape of presynaptic pulses, the devices demonstrate diverse biological STDP learning rules, including Hebbian, anti-Hebbian, all-LTP, and all-LTD. Integrated single- and multi-channel networks exhibit self-learning, system-level adaptive, and competitive behaviors. Experimentally extracted STDP parameters are implemented in SNN simulations, where network performance is determined by the long-term potentiation/depression area ratio (LTP/D area ratio, PDR) of the STDP curve. When PDR ≥ 1.25, robust pattern classification is achieved, reaching up to 90.9% accuracy on MNIST tasks. These results mark a milestone in timing-dependent neuromorphic hardware, demonstrating device-level feasibility toward adaptive and real-time learning hardware.

The rapid expansion of the Internet of Things (IoT) has significantly raised concerns over secure identification and authentication of IoT devices. While physical unclonable function (PUF)-based anticounterfeiting cryptography shows promise, implementing multi-factor authentication (MFA) system with resource-constrained PUF device remains a significant challenge. Here, we demonstrate a multidimensional-encoded optical PUF fabricated with multi-color quantum dots (mQDs), resilient to machine learning attacks, for use in anticounterfeiting MFA. Randomly distributed mQDs in a periodic nanostructure fabricated via nanoimprint lithography generate spatially chaotic, unpredictable multiple security keys when ultraviolet (UV) light is only illuminated. Photoluminescence measurements revealed irregular mQD emission, where disordered distribution-induced Förster resonant energy transfer produces unpredictable color patterns. Our PUF-induced multiple keys were validated through advanced PUF metrics like uniformity, uniqueness, correlation factor, entropy, and even resilience to machine learning attack. We further demonstrate efficient implementation of a cryptography protocol with MFA system for IoT applications using mQDs-based optical PUFs. Material systems with physical unclonable functions (PUF) are needed for secure authentication. Here, a multidimensional-encoded optical PUF fabricated with multi-color quantum dots is demonstrated, for multi-factor authentication.

Two-dimensional (2D) transition metal dichalcogenides (TMDs) have emerged as a first-rate candidate for post-silicon channels in field-effect transistors (FETs), particularly in the context of monolithic three-dimensional (M3D) integration. Despite the recent synthetic advances including industry-compatible wafer-scale production, they have predominantly been prepared on the ultra-flat, non-processed surfaces, limiting device architectures to outdated planar FETs and geometrically restricting their versatile applications. Integrating 2D semiconductors into 3D device architectures currently presents two significant challenges: i) stackablity, and ii) scalablility . While 2D material-based FETs have been primarily limited to traditional planar devices structures, their applications to vertically integrated 3D devices have been hindered by low-fidelity transfer method which is certainly challenging in conformally and controllably transferring atomically thin materials onto steep sidewalls. Here, we report a directly growth-and-fabrication approach enabling the dimensional transition from 2D planar FETs to a 3D vertical-channel FETs (VCFETs) through the atomically conformal direct growth of monolayer (ML) MoS 2 onto the pre-fabricated VCFET structures (Fig. 1A). Leveraging the inherently anisotropic in-plane growth kinetics and precisely controlled supersaturation based on metal-organic chemical vapor deposition, we achieved 100% step coverage even with sub-1-nm channel thickness without compromised crystallinity along an exceptionally high aspect ratio exceeding 15,000 (Fig. 1B). We proved that monolayer MoS 2 grown along the SiO 2 vertical sidewall is a single crystal by comparing the angles of the selected-area electron diffraction (SAED) pattern in transmission electron microscope (TEM) at the three vertices of MoS 2 (Fig. 1C). Fig. 1D shows a cross-sectional scanning transmission electron microscope (STEM) image of the VCFET with and spatial distribution of each element was also identified by energy dispersive X-ray spectroscopy (EDS) mapping images, and it convincingly suggests that atomically conformal monolayer MoS 2 was indeed integrated without discontinuity and void even along a steep trench edge (Fig. 1D). Fig. 1E illustrates the unit device schematic of the monolayer MoS 2 VCFET. The experimental and simulated transfer characteristic ( I DS - V GS ) of VCFET with vertical monolayer MoS 2 well-coincide each other, showing the subthreshold swing (SS) of 77mV·dec −1 and the ON/OFF ratio of 10 8 under a drain-to-source bias ( V DS ) of 1V (Fig. 1F). Output characteristic ( I DS - V DS ) indicates the change in conductivity of the MoS 2 channel by regulating the V G at steps of 1V from −2V to 5V (Fig. 1G). To evaluate device-to-device variation and statistic distribution of their performance, electrical characterization of the 7×7 VCFETs array was performed and their I DS - V GS curves under V DS = +1V exhibited the excellent reproducibility (Fig. 1H). Fig. 1I shows low OFF-state current density of 10 −13 A∙μm −1 at all devices in our monolayer MoS 2 VCFET array, which is 10 times lower than the International Roadmap for Devices and Systems (IRDS) 2028 low-standby power device requirement (~10 −12 A∙μm −1 ). Sentaurus technology computer-aided design (TCAD) simulations for monolayer MoS 2 VCFET were performed to investigate the electric field distribution of ON-state ( V GS = +5V) and OFF-state ( V GS = −2V), respectively (Fig. 1J-K). To demonstrate how electron concentration changes in monolayer MoS 2 at the sidewall control the switching operation of the transistor, we fabricated a multi-gate VCFET (Fig. 1L). The additional terminals, a modulation gate (MG) and a back gate (BG), facilitate to form an effective gate length near the control gate (CG), enabling a switching behavior of the transistor. The MG screens the electric field toward the top of the trench from the CG, maintaining the electron concentration of the monolayer MoS 2 on the top region of the trench and restricting switching operation to monolayer MoS 2 on the vertical sidewall. I DS - V CG curve was obtained by applying the CG bias ( V CG ) and the BG bias ( V BG ) of +30V with the floated MG bias ( V MG ) (Fig. 1M). The fabricated multi-gate VCFET further validated the superior sidewall-gate controllability of the ultrathin monolayer MoS 2 channel on the vertical sidewall, with aid of TCAD simulation. In the ON-state ( V CG = +2.5V), the MG screens electric field generated by CG, allowing the electric field of CG to accumulate electrons effectively along the vertical monolayer MoS 2 sidewall, as shown in Fig. 1N. in the OFF-state ( V CG = −2.5V), the electric field contour plot reveals that the electric field from the CG does not reach the top region of trench due the MG, while forming a strong electric field near the CG, leading to deplete the MoS 2 channel (Fig. 1O). Our work establishes a tailored pathway for the bespoke monolithic integration of ML semiconductors, positioning them as viable channels for high-density, high-performance computational device. Our integration strategy is undisputed pathway for M3D integration and usher in a new era of atomic-level fabric. Figure 1

QD) layer, the device induces probabilistic trapping-de-trapping dynamics, producing random photospike currents under optical pulse trains. The spike currents show high entropy and enable multi-level random number generation beyond binary, providing ternary outputs with near-ideal statistics (33.30% uniformity, 33.28% inter-Hamming distance) and full success in all 15 NIST tests. We further develop an image authenticity verification system by integrating the PS-TRNG with a mobile platform and custom-designed circuit board, enabling hardware-based detection of unauthorized image modifications. The random numbers are embedded as a hidden layer within the image data without degrading visual quality, enabling detection of unauthorized modifications. The system can successfully identify image modifications, even those involving highly sophisticated manipulations generated by artificial intelligence (AI)-based image editing tools. The device maintains stable operation over 2 million cycles and remains reliable even after more than 460 days, demonstrating its long-term stability.

ion migration induce a phase transition, leading to sharp resistance switching and efficient spiking. This device successfully mimics key neuronal dynamics, including leaky integrate-and-fire, threshold tuning, and spatiotemporal dynamics, without requiring auxiliary reset circuits. Furthermore, SNN is constructed by integrating CIPS-based synaptic and neuron devices and evaluate face classification performance using an unsupervised learning approach, achieving a recognition accuracy of 95.83% via the lateral inhibition function of the neuron device. The findings highlight the potential of CIPS TS-FET as energy-efficient spiking neuron device applications for next-generation SNN-based neuromorphic computing systems.

The pursuit of hardware-based security solutions has highlighted the true random number generator (TRNG). Various physical phenomena, from noise generation to quantum physics complexities, have been explored for random number generation. The arc discharge light-induced TRNG (ALTRNG) is introduced, featuring wavelength-dependent photocurrent generation and arc discharge irradiation. A bipolar photo-responsive photodetector (BPPD) differentiates "1" and "0" states, producing highly random bits validated by the National Institute of Standards and Technology (NIST) 15 tests. The BPPD's response to deep-ultraviolet (DUV) and blue light enables distinct photocurrent generation under arc discharge illumination. The ALTRNG generates true random signals, yielding bit streams with unpredictability, uniform distribution, and stability. With a readout circuit achieving 2-kbps, wireless random number transmission is demonstrated, highlighting potential for secure password systems and artificial X-ray image generation.

Abstract Spiking neural networks (SNNs) represent a promising computing architecture for neuromorphic hardware, as they process and store information through spike signals, closely mimicking the way the human brain operates. However, most synaptic devices recently proposed for hardware SNN implementations are limited to exhibiting analogue tuning within a single conductance polarity, making them inadequate for realizing scalable and energy‐efficient neuromorphic systems. In this study, an optoelectronic synaptic device based on a ReS 2 /WSe 2 / h ‐BN heterostructure, enabling conductance modulation across both positive and negative states within a single device is demonstrated. This bidirectional plasticity originates from electrostatic modulation of the WSe 2 Fermi level, induced by voltage pulses applied through an O 2 plasma‐treated h ‐BN weight‐control layer. The device exhibits reversible photocurrent polarity, reliable potentiation/depression of the postsynaptic current, and stable synaptic weight retention with reproducible multi‐cycle operation. System‐level simulations using a 1024–20–3 SNN architecture confirmed the functional advantage of a bidirectional synapse, with networks achieving over 95% facial recognition accuracy within 20 training epochs, whereas the unidirectional synapse‐based network plateaued below 75%. These findings highlight the potential of optoelectronic synaptic device with bidirectional plasticity as a promising device platform for efficient on‐chip learning in next‐generation neuromorphic hardware system.